1. Field of the Invention
The present invention relates to a display device, and more particularly, to an in-plane switching mode liquid crystal display (LCD) device and a method for manufacturing the same.
2. Background of the Related Art
An in-plane switching mode LCD device is an LCD device having a wide viewing angle, which has been developed for solving a problem of having a narrow viewing angle in a Twisted Nematic LCD device. In the in-plane switching mode LCD device, common and pixel electrodes are formed on one substrate, and liquid crystals are driven by a horizontal electric field generated between the common and pixel electrodes, so that a viewing angle in the in-plane switching mode LCD device is wider than a viewing angle in the Twisted Nematic LCD device.
A related art LCD device structure and a method for manufacturing the same will be described with reference to the accompanying drawings.
FIG. 1A is a structural plan view illustrating a structure of the related art in-plane switching mode LCD device. FIG. 1B is a plan view taken along line I–I′ of FIG. 1A.
As shown in FIG. 1A, the related art in-plane switching mode LCD device includes gate line 211 and data line 212 arranged on an insulating substrate (not shown) to define a pixel region, a common line 213 arranged within the pixel region in parallel with the gate line 211, a thin film transistor formed at a crossing point between the gate line 211 and the data line 212, a pixel electrode 208 arranged within the pixel region in parallel with the data line 212 and connected with a drain electrode of the thin film transistor, and a common electrode 210 arranged within the pixel region in parallel with the data line 212 and extending from the common line 213.
The thin film transistor will be described in detail with reference to FIG. 1B. A gate electrode 202 is formed on an insulating substrate 201, and a gate insulating film 203 is formed on the surface of the insulating substrate 201 including the gate electrode 202. Then, a semiconductor layer 204 is formed like an island on the gate insulating film 203 above the gate electrode 202, and an ohmic contact layer 205 is formed on both sides of the gate electrode 202 on the semiconductor layer 204. Source electrode 206 and drain electrode 207 are formed at both sides of the gate electrode 202 above the semiconductor layer 204. An ohmic contact layer 205 is formed between the source and drain electrodes 206 and 207 and the semiconductor layer 204. A pixel electrode 208 is formed on the drain electrode 207 and the gate insulating film 203. A passivation film 209 is deposited on the gate insulating film on which the pixel electrode 208 is formed, and a common electrode 210 is formed on the passivation film 209.
Generally, in the related art LCD device shown in FIG. 1B, the gate insulating film 203 and the passivation film 209 may consist of a silicon nitride film (SiNx). The gate electrode 202 may consist of conductive materials such as copper (Cu), titanium (Ti), and chromium (Cr). The source electrode 206 and the drain electrode 207 may consist of chromium (Cr) in taking into consideration of the etching selectivity with a transparent electrode.
A method for manufacturing the related art in-plane switching mode LCD device will now be described with reference to FIG. 2A to FIG. 2E.
FIG. 2A to FIG. 2E are plan views illustrating process steps for manufacturing the related art in-plane switching mode LCD device.
As shown in FIG. 2A, gate line materials and conductive metal materials, are deposited on the insulating substrate 201 by a process such as sputtering. Then, the gate electrode 202 is formed by a patterning process such as photolithography. The gate insulating film 203 consisting of a silicon oxide film or a silicon nitride film, the semiconductor layer 204 of amorphous silicon, and the ohmic contact layer 205 of amorphous silicon containing n-type dopant, are deposited by a process such as plasma enhanced chemical vapor deposition (PECVD).
As shown in FIG. 2B, the semiconductor layer 204 and the ohmic contact layer 205 formed on the gate insulating film 203, are selectively patterned.
As shown in FIG. 2C, a data line material, a conductive metal material such as chromium (Cr), is deposited on the ohmic contact layer 205 by a sputtering process, and the source electrode 206 and the drain electrode 207 are formed by a patterning process such as photolithography, so that the thin film transistor is formed.
As shown in FIG. 2D, the pixel electrode 208 is formed on the drain electrode 207.
As shown in FIG. 2E, the passivation film 209 is deposited on the substrate, on which the above layers are deposited, by a plasma enhanced chemical vapor deposition (PECVD) process. The transparent common electrode 210 is formed on the passivation layer 209 using a conductive material such as indium tin oxide (ITO). Therefore, the manufacturing process steps of the related art LCD device are completed.
However, there are following problems in the related art in-plane switching mode LCD device.
First, the pixel electrode occupies space within the pixel region and so, an aperture ratio is reduced by an area occupied by the pixel electrode.
The pixel electrode connected with the drain electrode can be formed as the transparent electrode for solving the problem of a decrease in the aperture ratio. However, if etching selectivity between the transparent electrode and the drain electrode is not considered, the drain electrode may be etched during patterning of the transparent electrode. Therefore, reliability of the device may be degraded.
Furthermore, if the drain electrode material is selected taking into consideration the etching selectivity ratio between the transparent electrode and the drain electrode, chromium is the most appropriate material for the drain electrode.
But, since chromium has low electricity conductivity, and especially affects resolution, there are limitations in implementing the in-plane switching mode LCD device having high resolution and a large size.